International Journal of Electrical and Computer Engineering (IJECE) Vol.
No.
August 2017, pp.
ISSN: 2088-8708.
DOI: 10.
11591/ijece.
A Simplified Speed Control Of Induction Motor based on a Low Cost FPGA Lotfi Charaabi.
Ibtihel Jaziri Departement of Electrical Engineering.
E-ENIT, university Tunis El Manar BP 37 EL Belvydyre, 1002 Tunis.
Tunisia
Article Info
ABSTRACT
Article history:
This paper investigates the development of a simplified speed control of induction motor based on indirect field oriented control (FOC).
An original PI-P controller is designed to obtain good performances for speed tracking.
Controller coefficients are carried out with analytic approach.
The algorithm is implemented using a low cost Field Programmable Gate Array (FPGA).
The implementation is followed by an efficient design methodology that offers considerable design advantages.
The main advantage is the design of reusable and reconfigurable hardware modules for the control of electrical Experimental results carried on a prototyping platform are given to illustrate the efficiency and the benefits of the proposed approach.
Received Jan 1, 2017 Revised Mar 16, 2017 Accepted Mar 30, 2017 Keyword:
Design efficiency FOC
FPGA
Induction machine PI controller Copyright A 2017 Institute of Advanced Engineering and Science.
All rights reserved.
Corresponding Author:
Lotfi Charaabi.
Departement of Electrical Engineering.
E-ENIT, university Tunis El Manar BP 37 EL Belvydyre, 1002 Tunis.
Tunisia.
Email:lotfi.
charaabi@enit.
INTRODUCTION
The Field Oriented Control (FOC) or vector control has seen rapid expansion in recent years.
The FOC can be used to vary the speed of an induction motor over a wide range.
It was initially developed by Blaschke in the beginning of 1970s .
The FOC can be implemented in two ways Indirect and Direct control scheme.
The technique described in this work is based on indirect FOC because there is no direct access to the rotor currents.
Indirect vector control of the rotor currents is accomplished using the following Rotor mechanical velocity Instantaneous stator phase currents Rotor electrical time constant The motor must be equipped with stator currents sensors and a rotor velocity feedback device.
Traditional indirect vector control consists of the ten blocks .
, .
Clarke forward transform block Park forward and inverse transform block Rotor flux angle estimator block Three PI controller blocks Field weakening block SVM block This paper presents a simplified speed control of induction Motor which consists of only six blocks:
Clarke inverse transform block Park inverse transform block Journal homepage: http://iaesjournal.
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ISSN: 2088-8708
Rotor flux angle estimator block One PI-P controller block Field weakening block Hysteresis block Microprocessors and Digital signal Processors (DSP) based solutions are available for digital AC motor control applications like DSPIC family from Microchip .
TMS320C24x family from Texas Instruments .
and STM32 family from STMicroelectronics .
Nevertheless, hardware solutions such as FPGAs have already been used with success in AC motor control and drive applications such as pulse width modulation (PWM) .
, .
Direct Torque Control of induction motor .
and FOC .
, .
In this paper, a simplified speed control of an induction motor based a low cost FPGA is proposed.
The FPGA implementation is outlined by an efficient design methodology which is based on modularity and reusability concepts .
, .
The major benefit for using FPGA is the achievement of the digital control algorithm within a few AA second .
The calculation time, including the A/D conversion time of 2.
4 AAs, for the proposed FPGA based controller is only equal to 3.
135 AAs.
So, for a 20 KHz power converter, the digital control feedback can be approximated quite closely to an analogue one because the effects of sampling and delay in the feedback loop are small compared to the process time scale improving therefore the performances of the control.
The first section will detail the simplified speed control strategy of an induction motor.
This strategy is based on indirect FOC.
The second section will present the hardware architecture design based FPGA.
Finally, in a third section, some experimental results carried on a prototyping platform will be shown for the validation of the developed control system.
SIMPLIFIED SPEED CONTROL STRATEGY
Principle of the Proposed Control Strategy The well-known discrete-time model of a squirrel-cage induction motor in the dq reference frame is used for this study.
The voltage, the stator flux linkage and the electromagnetic torque Equations expressed in the rotor reference frame .
-q coordinates, with d-axis linked to the inducto.
yc = .
cI ycI )ycn yuaya Oe .
ui yuaya ycn ycI yue )A .
yc = .
cI ycI )ycn yuaya .
ui yuaya ycn yui yue ).
=ycI ycn Oe .
ui Oe yui )yue .
=ycI ycn Oe .
ui Oe yui )yue .
=ya ycn ya ycn =ya ycn ya ycn =ya ycn ya ycn =ya ycn ya ycn ue ycn Oeyue ycn ) .
ui Oe yui ) = yui yui = .
Where Rs is the stator resistance.
Rr is the rotor resistance.
Lm the stator/rotor mutual inductance.
Ls and Lr the stator-rotor inductances, p the number of pole pairs.
O e the electrical velocity.
Or is the angular velocity of the rotor.
Osl is the slip velocity, usd and usq the d-q components of the stator voltage, i sd and isq the d-q components of the stator current, urd and urq the d-q components of the rotor voltage, ird and irq the dA Simplified speed Control Of Induction motor based on a low cost FPGA (Lotfi Charaab.
A ISSN: 2088-8708 q components of the rotor current.
Osd and Osq the d-q components of the stator flux linkage .
Ord and Orq the d-q components of the rotor flux linkage and Te the electromagnetic torque.
The rotor flux is allowed to be aligned with the d-axis so that yue This constraint can be represented by the vector diagram in Figure 1.
q-axis O d-axis Or isd sl r e Roto Stator frame Figure 1.
Induction machine vector diagram with Orq set to zero Setting Orq to zero in Equations .
, the new torque Equation becomes.
ue ycn ) .
If Equations .
are combined using the constraint .
, the rotor flux Equation becomes yue Where s denotes the differential operator d/dt and Er the rotor time constant.
Equation .
implies that the rotor flux depends only on the stator current.
If Equations .
are combined using the constraint .
, the slip velocity becomes yui =Oe .
Using Equations .
a new slip velocity Equation can be defined yui = .
So, the slip angle is estimated by the following relation:
Where sl0 is the initial slip angle which can be set to zero Equation .
gives and Ord Using Equations .
, .
, the q-component stator voltage usq can be expressed with isd, isq yc = .
cI 2ycI )ycn yuaya .
uaya yui ycn ) IJECE Vol.
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For this control strategy, the d-component stator current isd is imposed to obtain the nominal torque.
Subsequently, by Equation .
, the d-component of the rotor flux linkage Ord becomes constant in steadystate.
Then, controlling isd implies controlling the torque.
The related control scheme is shown in Figure 2.
PI-P
,b,.
isc Hys O r* PI-P controller block Angle and speed estimator block Dq-to-abc transform block Hysteresis controller block Field weakening block .
e r Figure 2.
Principle of the control strategy PI-P Controller Design The PI-P regulator is introduced into the control scheme in order to achieve a second order system with a damping coefficient =0.
The dynamic model of the speed induction motor drive is significantly simplified, and can be reasonably represented by the block diagram shown in Figure 3.
E represents the time constant for the desired current isq Figure 3.
The block diagram of the PI-P regulator with the process Figure 4.
P regulator associated with the process The goal of the P regulator is to obtain a second order system with real poles in closed loop.
In order to simplify the calculation we neglect the viscous friction coefficient f.
Figure 4 shows the simplified block diagram of the P regulator with the process.
A Simplified speed Control Of Induction motor based on a low cost FPGA (Lotfi Charaab.
A ISSN: 2088-8708
The closed loop transfer function
( )
( )=
( )
The P coefficient kv is selected to obtain a double real pole called On .
Then, the transfer function becomes ( )= .
Where On=1/2E The PI regulator is introduced before the P regulator in order to compensate the real pole O n and to obtain a second order system in closed loop To compensate the real pole On.
PI coefficients must obeys this rule =yui .
Using Equation .
, the global closed loop transfer function becomes ( )= ( ) ( ) .
Then, for a desired damping coefficient , kp is expressed by the following Equation
ARCHITECTURE DESIGN
The purpose of this section is to develop a discrete-time and an optimized architecture based FPGA for the control algorithm.
The most used discretization method is based on Forward shift approximation .
The shift form approximation is given by .
Where T is the sampling period.
As shown in Figure 2, the control algorithm is divided into four modules.
The description of the different modules is detailed below.
PI-P controller block: This module generates the digital values of the stator component references isq* through the rotor angular velocity error.
The discretization of the PI-P algorithm using the Forward shift approximation gives ( )=yui ( )Oeyui ( ) ( ) ycn( ) yc( ) = ( ) ycn( ) = ycn( Oe .
cn ( ) = .
c( ) Oe yui ( )) Where Kp.
Ki and Kv depends on kp, ki, kv and T The data flow graph (DFG) corresponding to the PI-P algorithm is presented in Figure 5 IJECE Vol.
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O*r.
Or.
Z-d
Z-1
Z-1
1/iT e .
Or.
Figure 5.
DFG of the PI-P controller, .
DFG of the speed and angle estimator Angle and speed estimator block: This module generates the rotor velocity Or and the electrical angle e through the rotor angle r.
The rotor angle is provided by an absolute coder.
The discretization of Equation .
provides the discrete-time Equation of the electrical angle ( )= ( Oe .
ycn ( ) ( ) .
Where The rotor velocity is obtained from the rotor angle using the following Equation:
( )
yui ( )= .
Where ( Oe ) is the rotor angle at instant Figure 5 shows the DFG of the estimator dq-to-abc transform block: This module contains the dq-to-abc transformation.
It generates the digital values of the stator current references isa*, isb* and isc*.
Equation .
shows a matrix representation of this module Oo
ycn( ) = Oe
[Oe Oo
( )
( )
( ) ycn
][ ]
( ) ycn Oo ] Using trigonometric formula.
Equation .
leads to the Equation .
ycn ycn =Oo ( =Oo ( ycn )ycn )ycn )ycn ) )ycn ) .
= Oeycn Oeycn A Simplified speed Control Of Induction motor based on a low cost FPGA (Lotfi Charaab.
A ISSN: 2088-8708 Figure 6 shows the DFG corresponding to the dq-to-abc transformation module.
11A/ A 6
A/2
Sin Sin Sin Sin Figure 6.
DFG of the dq-to-abc transformation estimator Hysteresis controller block: This module contains three identical hysteresis controllers.
It generates the switching states c1, c2 and c3 via the comparison of the stator current references to the measured stator Experimental Set-up For this project, the used FPGA target is a XC2s100 from Xilinx Inc.
The FPGA based hardware control system includes the speed controller, an AD converter interface and a serial interface in one FPGA Figure 7 shows the corresponding implemented architecture.
Start
Fs Read
DIV
FOC i .
Serial
Interface Clock
40MHz
Coder
Interface Control Unit
isa isb
Control
FPGA
r c1.
Figure 7.
FPGA based hardware control system The serial interface module provides a serial communication between the host PC and FPGA.
The control unit is started at each rising edge of the sampling frequency Fs.
It activates firstly the AD and coder interface which starts the AD conversion process.
AD conversion of the stator currents takes 2.
4AAs.
When the conversion process is finished, the AD interface module read converted data and treats them to generate the digital values of the measured stator currents isa.
, isb.
and isc.
Then, the control unit activates the speed controller module.
This module allows the generation of the switching states c1.
, c2.
and c3.
of the VSI.
The computation time, including the AD conversion time, from the AD converter stator currents acquisition IJECE Vol.
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to the switching states generation is equal to 3.
135 AAs.
By comparison, the used dead time of the used VSI is 3 AAs.
So the computation time is almost negligible and the digital control feedback can be approximated to an analog one.
To test the FPGA based controller, a test bed for the control of an induction machine was Figure 8 shows the prototyping platform.
VSI
Host
VSI
FPGA
Figure 8.
Prototyping platform .
Control system .
General view isa (%) isa (%) The test bed is composed of a 0.
75 Kw induction motor provided with a 1024 points encoder, current sensors and a controlled load for load torque generation.
The VSI module includes a three phase IGBT based inverter, a 2200 AAF capacitance and a three phase diode rectifier.
An AD conversion circuit board is used to convert the measured currents and an inverter interface circuit board allows the voltage level adaptation of the switching states for the control of the inverter.
Figure 9.
Stator current isa for speed step input from 200 rad/s to 50 rad/s(Band width=0%Isn , and Fs=10KH.
Stator current isa for speed step input from 20 rad/s to 200 rad/s(Band width=0%Isn , and Fs=10K H.
During experimentation, the DC voltage source E of the three phase inverter is set to 400V.
Figure 9 presents the experimental results of the stator current isa for an hysteresis controller band width equal to 0% of the rated line current, a sampling frequency Fs equal to 10KHz and different values of the speed input.
Figure 10 presents the speed response of the system for ramp input.
It shows the speed response after a torque load perturbation.
The speed response is provided by the serial interface to a host PC.
Experimental results shown in Figure 9 and Figure 10 give proof that the control system satisfy the basic requirements of the control strategy and validate therefore the good functionality of the system.
The same experiment has been done in the literature .
with the indirect FOC which gave similar performances.
Table 1 shows the variation of the time response for the indirect FOC and the simplified indirect FOC.
Table 1.
Variation of settling time, maximum overshoot with indirect FOC Controller Rise time Maximum overshoot in (%) Indirect FOC Simplified indirect FOC A Simplified speed Control Of Induction motor based on a low cost FPGA (Lotfi Charaab.
A ISSN: 2088-8708 speed .
With load Without load speed .
Figure 10.
Speed response of ramp as function of time .
Speed response for 200 rad/s reference input
without and with torque load
CONCLUSION
This paper presents the implementation on a FPGA of a simplified speed control for induction The control algorithm is based on indirect FOC.
It uses only six blocks instead of ten blocks.
A PIP regulator is designed to obtain good performances for speed tracking.
The algorithm was implemented on a low cost FPGA.
The implementation has rigorously followed an efficient design methodology.
This methodology was used with success for the speed control of induction machine using FPGA based controller and it can be considered as a part of a process whose target is the creation of a specific electrical system library of optimized reusable modules which will ensure a great flexibility for the design development.
ACKNOWLEDGEMENTS
This paper was supported by the Tunisian Ministry of High Education and Research: UR-LSEENIT-03/UR/ES05 REFERENCES