International Journal of Electrical and Computer Engineering (IJECE) Vol.
No.
February 2017, pp.
ISSN: 2088-8708.
DOI: 10.
11591/ijece.
A New Proposal for OFCC-based Instrumentation Amplifier Deva Nand.
Neeta Pandey Department of Electronics and Communication Engineering.
Delhi Technological University.
Delhi.
India
Article Info
ABSTRACT
Article history:
This contribution puts forward a new voltage mode instrumentation amplifier (VMIA) based on operational floating current conveyor (OFCC).
It presents high impedance at input terminals and provides output at low impedance making the proposal ideal for voltage mode operation.
The proposed VMIA architecture has two stages - the first stage comprises of two OFCCs to sense input voltages and coverts the voltage difference to current while the second stage has single OFCC that converts the current to voltage.
In addition it employs two resistors to provide gain and imposes no condition on the values of resistors.
The behavior of the proposed structure is also analyzed for OFCC non idealities namely finite transimpedance and tracking error.
The proposal is verified through SPICE simulations using CMOS based schematic of OFCC.
Experimental results, by bread boarding it using commercially available IC AD844, are also included.
Received Sep 14, 2016 Revised Nov 20, 2016 Accepted Dec 5, 2016 Keyword:
AD844
Common-mode rejection ratio instrumentation amplifier Operational floating currentconveyor Voltage-mode Copyright A 2017 Institute of Advanced Engineering and Science.
All rights reserved.
Corresponding Author:
Deva Nand.
Department of Electronics and Communication Engineering.
Delhi Technological University.
Shahabad.
Bawana Road.
Delhi.
India.
Email: devkamboj07@gmail.
INTRODUCTION
Design and development of analog signal processing and generating circuits using current mode (CM) building blocks has been mainstay for past few years.
Current conveyor and its variants, being versatile CM building blocks, have been used extensively for these applications.
The operational floating current conveyor (OFCC) .
is a variant of current conveyor with attractive features of both high and low impedance at input and output ports which make it suitable for sensing both currents and voltage and providing the sensed variable in form of current and voltage.
The OFCC has been used to develop variable gain amplifier .
, basic amplifier circuits .
oltage, current, transimpedance and transconductanc.
, filters .
, instrumentation amplifier .
, .
, readout circuits .
, logarithmic amplifier .
, rectifier .
, and wheatstone bridge .
in recent past.
This papers aims at presenting an instrumentation amplifier (IA) which is inevitably used in areas pertaining to industrial process control .
, automotive transducers .
, bio-potential acquisition systems .
and linear position sensing .
, to suppress unwanted common mode noise and to amplify differential signals.
In general, the IA structures are classified according to the active block used for realization or on the basis of type of input/output it processes/provides.
Taking the later classification into consideration, the available IA may be viewed as voltage mode IA (VMIA), current mode IA (CMIA), transimpedance mode IA (TIMIA) and transadmittance mode IA (TAMIA).
The available VMIAs .
, .
, .
employ various active blocks and are compared on the basis of number and type of active block, numbers of resistors/capacitors, input and output impedance, as shown in Table 1.
The findings are placed in Table 1 and following points are noted:
The structures presented in .
, .
use large number of active blocks while those reported in .
Figure 4.
], .
, .
, .
employ many passive components.
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ISSN: 2088-8708
The input impedance of all VMIAs is high while the output impedance of .
, .
, .
is not appropriate therefore an additional active block would be needed to access the output.
Though the active block count is less than or equal to three in .
, .
, but an additional active block is needed to access output.
The VMIA .
Figure 5.
] uses three number of active blocks and resistors each and presents output at proper impedance level.
Both VM and CM active blocks are employed in .
, .
, .
therefore the bandwidth is governed by VM block.
Component matching is needed in .
, .
, .
for proper operation.
Table 1.
Characteristics of Available VMIA Circuits Ref.
No.
Active Block Used .
Figure 4.
] .
Figure 5.
] .
2 OFCC
4OFCC
3OFCC
2 opamps 3 opamps 4 opamps 3 opamps 3 opamps 3 opamps 4 opamps 3 opamps 5 opamps 2 CCII , 1 opamp
6CCII , 1opamp
6CCII , 1opamp
2 CCII
3 CCII
2 CCII
2 CCII
2CC, 2opamps 3 opamps, 2 cm*, 1 cs** 3 cII
2 OC
2CCII
Resistors/ CapacitorsUsed 3, 1 capacitor 2, 1 capacitor Nil 1 active resistor Input High High High High High High High High High High High High High High High High High High High High High High High High High Output High Low Low Low Low Low Low Low Low Low Low Low Low Low Low High High High High High Low High High High High * current mirrors, ** current subtractor It can be inferred from above discussion that the VMIA reported in .
Figure 5.
] uses least component count but requires component matching.
The main motivation of this work is to present OFCC based VMIA that uses same active block count as .
Figure 5.
] and only two resistors without matching The paper is detailed in four Sections.
Section 2 describes OFCC port relationship and proposed OFCC based VMIA topology.
This Section also includes the behavior of proposed topology in presence of non-idealities namely finite transimpedance gain and tracking errors.
The verification of theoretical predictions is done both through simulations and experimentation.
The corresponding results are put forward in Section 3.
The findings of the paper are concluded in Section 4.
PROPOSED OFCC BASED VMIA
Operational Floating Current Conveyor (OFCC) The OFCC has two inputs and two outputs and is represented by circuit symbol shown in Figure 1.
The input ports Y and X (W and Z) is used respectively for sensing .
voltage and currents.
The ports X and W have low impedance whereas ports Y and Z present high impedance.
A New Proposal for OFCC-based Instrumentation Amplifier (Deva Nan.
A ISSN: 2088-8708 Figure 1.
Electrical symbol of the OFCC The OFCC operation is based on the port relationship of .
Here, the term Zt represents open loop transimpedance and its value is very high, therefore feedback between W and X port is essential for developing any application.
The frequency dependence of parameter Z t in .
is represented using single pole model and is approximated as Zt .
= 1/sCp at high frequencies where Cp = ZtoOtc (Zto represents open loop transimpedance gain and Otc corresponds to its cut off frequenc.
The voltage and current transfers at X and Z ports have a multiplication factor of and .
Ideal values of these factors are unity, however, in practice there is deviation from this value.
The effect of non-ideal voltage and current transfers on circuit operation depends strongly on topology e.
the performance of the circuit remains unaffected if the terminals whose behaviour is affected by non Ae ideal behaviour are not used in case of current terminal or corresponding voltage port is grounded.
Proposed Topology The architecture of the proposed VMIA, as depicted in Figure 2, comprises of two stages.
The first stage, comprises of two OFCCs and a current determining resistor R1, provides current proportional to input voltage difference (Vin1 - Vin.
A single OFCC (OFCC.
and a resistor are used in second stage which converts the current output of first stage to voltage.
Figure 2.
Proposed Instrumentation Amplifier IJECE Vol.
No.
February 2017 : 134 Ae 143
IJECE
ISSN: 2088-8708
Using the port relationships of .
, voltages at nodes P and Q in Figure 2 are computed as .
which give current output (Iou.
of the first stage as ( ) ( ) .
The third OFCC coverts Iout to output voltage (Vou.
Routine analysis of the circuit gives Vout as ) ( ) ( ) .
Substituting Iout in Equation .
yields ( ) ( ) .
Representing Vin1 = VCM i and Vin2 = VCM Ae i, differential mode gain (A.
and common mode gain (ACM) are computed respectively as:
( )
( )
( )
( )
It is clear from Equation .
that if the OFCCs are matched, the current output (Iou.
would be zero for common mode input and would result in zero output voltage.
There will be deviation from zero output if the OFCCs at input stage are not matched which are discussed in the following Section.
Using Eqs.
, the common mode rejection ratio (CMRR) is calculated as .
In practice, the values of 1 and 2 are close to unity, therefore the proposed topology can give a high value of CMRR.
Considering = 1, 1 =2 =1 and frequencies much below ( ( ) ( )).
Equation .
reduces to .
It is clear from Equation .
that no matching constraint is imposed on component values for obtaining differential gain.
Comparing the proposed VMIA with available OFCC based VMIAs Figure 5.
] having similar input and output impedances, it is found that later uses equal resistors in first
SIMULATION AND EXPERIMENTAL RESULTS
The proposal is examined through SPICE simulations wherein CMOS based schematic of OFCC of Figure 3 .
is used.
Model parameters of 0.
5 AAm technology from MOSIS (AGILENT) are used.
The dimensions of various MOS transistors are given in Table 2.
The supply voltages is taken as VDD = -VSS = 1.
5V while the bias voltages of VB1 = -VB2 = 0.
8V are considered.
The passive components values are taken as R1 = 1 kE and R2 as 5 kE, 10 kE, 15 kE and 20 kE to obtain gain values of 14 dB, 20 dB, 23.
5 dB and 26 dB respectively.
A New Proposal for OFCC-based Instrumentation Amplifier (Deva Nan.
A ISSN: 2088-8708 Figure 3.
Internal Structure of OFCC .
Table 2 MOS transistors Dimensions of the OFCC Structure shown in Figure 3 .
MOS Transistor W ( A.
/ L( A.
M 1.
M 2
50 / 1
M 3.
M 4.
M 11.
M 12.
M 14
50 / 2.
M 5.
M 7.
M 10.
M 15
20 / 2.
M 6.
M 8
40 / 2.
M 9.
M 13
100 / 2.
Figure 4.
Gains of Proposed Topology with respect to Frequency Figure 5.
CMRRs of Proposed Topology with respect to Frequency IJECE Vol.
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ISSN: 2088-8708
Figure 6.
Noise Analysis of Proposed Topology with respect to Frequency For validation of simulated observations the proposal is prototyped.
The OFCC is realized with commercially available IC AD844AN .
using the setup shown in Figure 7.
Experimental observations are plotted for frequency response and CMRR as shown in Figure 8.
and Figure 8.
Output signal obtained through prototype for input signal at frequency of 100 kHz and 1 MHz is shown in Figure 9.
and Figure 9.
respectively for authentication.
Figure 10.
shows practical performance for sinusoidal.
Figure 10.
for square and Figure 10.
for triangular input signals at frequency of 100 kHz each as a proof of the proposal.
Various performance parameters such as CMRR, its bandwidth and CMRR gain bandwidth product (GBP), are compared for available references along with proposed topology parameters and are listed in Table 3.
As the IAs given in .
, .
, .
and the proposed one have been tested for different differential gains and at different power supply voltages, it is not fair to compare these on the basis of gain and power consumption.
It is found that proposed VMIA outperforms in terms of both CMRR and its CMRR gain bandwidth product (GBP) as compared to OFCC based VM IA reported in .
Figure 5 .
As the data for CMRR bandwidth is not available for .
, .
, .
, .
, .
, the comparison of CMRR GBP for the proposed topology is best among all.
Figure 7.
Realization of OFCC using AD844AN A New Proposal for OFCC-based Instrumentation Amplifier (Deva Nan.
A ISSN: 2088-8708 .
Frequency Response .
CMRR Figure 8.
Simulated and Experimental Results.
Frequency Response and .
CMRR .
Figure 9.
Outputs .
04 V eac.
Observed for Input .
mV eac.
100 kHz and .
1 MHz Frequency Table 3.
Performance Parameters of Available and Proposed IA Circuits Ref.
No.
Figure 4.
] .
Figure 5.
] .
Proposed NA: Not available Mode CMRR .
B) >70 at 100 kHz
> 60
>70 at100 kHz IJECE Vol.
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February 2017 : 134 Ae 143 - 3dB frequency (CMRR) 185 kHz 148 kHz 525 kHz 65 kHz Upto 200 kHz 65 kHz 2 kHz 10 kHz 35 kHz 69 kHz Power Supply (Volt.
A1.
A1.
A1.
A1.
A2.
A2.
A3.
A1.
Experimental Results Yes
Yes
Yes
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IJECE
ISSN: 2088-8708
Ch1:
Vout = 1.
04 V .
, 100 kHz R1 = 1kE.
R2 = 5kE .
ain = 14 dB).
Ch2:
Vin = 200 mV .
, 100 kHz Sinusoidal .
Sinusoidal Ch1:
Vout = 1.
04 V .
, 100 kHz R1 = 1kE.
R2 = 5kE .
ain = 14 dB).
Ch2:
Vin = 200 mV .
, 100 kHz Square .
Square Ch1:
Vout = 1.
04 V .
, 100 KHz R1 = 1kE.
R2 = 5kE .
ain = 14 dB).
Ch2:
Vin = 200 mV .
, 100 kHz Triangle .
Triangle Figure 10.
Experimental Results of the Proposed IA for .
Sinusoidal .
Square .
Triangular Input
CONCLUSION
An OFCC based VMIA is proposed in this work that uses three OFCCs and two resistors.
The input and output impedances of the proposal are high and low respectively therefore the structure can be used to sense signal from voltage sensor and interface output with system processing voltage signal.
Effect of non idealities on behavior of proposal is included.
Workability of the proposal is verified through SPICE simulations and experimentations.
Comparison of the proposed VMIA with its available counterparts shows that it has highest CMRR GBP and has lowest component count.
REFERENCES